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ISBN-13: 9780120121236

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An MILP approach is required because discrete (V , f ) settings lead to a non-convex optimization space. Their technique reports improvements in energy savings compared to prior work. However, it does not account for the energy penalties incurred by mode switching. Furthermore, the long runtimes of straightforward MILP approaches make their integration into a compiler somewhat undesirable. Work by Xie et al. expanded on these ideas in several ways [229, 230]. First, they expanded the MILP approach by including energy penalties for mode switches, providing a much finer grain of program control, and enabling the use of multiple input data categories to determine optimal settings.

If the region is clearly memory-bound, it is instrumented with DVFS mode-set instructions. 3: RDO flowchart. Reproduced from [226]. Copyright 2005 IEEE. slowing it down does not hurt the overall performance and can save power. DVFS approaches, after all, are exploiting slack. If the code is CPU-bound, it is left alone since slowing it down could seriously degrade the performance. If a decision for memory- or CPU-boundedness cannot be made and the region is large enough, it is divided up into smaller regions and the algorithm repeats for each of the smaller regions.

As with other DVFS opportunities, the key lies in finding inter-domain slack that one can exploit. For example, in some MCD designs, the floating point unit could be clocked much more slowly than the instruction fetch unit, because its throughput and latency demands are lower. 5: Synchronous versus GALS processor. Reproduced from [117]. Copyright 2002 IEEE. clock domains, the drop in performance ranges between 5% and 15%, while power consumption is reduced by 10% on the average. Thus, fine-grained voltage scaling allows GALS to match or exceed the power efficiency of fully synchronous approaches.

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Advances in Computers, Vol. 23


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